Technological progress continues! TSMC throws a number of heavy weights: for the automotive field to launch a new 5nm process, 4nm early trial production ….

TSMC today held an online technology forum in 2021 to announce the latest developments in logic technology, special technology and 3D packaging technology. Among them, it includes the N6RF process supporting the new generation of 5G smart phones and WiFi 6max 6e, the N5A process for automotive chips, and the enhanced version of 3DFabric technology.

In terms of logic and technology, TSMC has received a lot of good news and is still a "bellwether" in the industry.

In the current logic technology of TSMC, the most advanced process has been handed over from 7nm to 5nm and will soon be inherited by 3nm.

TSMC announced the 6nm RF (N6RF) process for the first time at today's forum, which supports the performance of 5G smartphones with millimeter wave band below 6GHz and WiFi 6Mab 6e, significantly reducing power consumption and area, while taking into account efficiency, function and battery life-compared with the previous generation of 16nm radio frequency technology, the efficiency of N6RF is improved by more than 16%.

5nm applications cover smartphones, high-speed computing, the Internet of things, etc., and the yield has exceeded expectations, with more than 500000 pieces shipped last year; and the extensive use of EUV, TSMC in the 5nm process will also continue to improve EUV production efficiency.

For the automotive sector, TSMC has launched the N5A process, which can meet the growing demand for computing power in automotive applications, such as driving assistance and digital vehicle cockpit support for AI. N5A brings the technology currently used by supercomputers to vehicles to meet the requirements of computing efficiency, power efficiency, logic density, quality and reliability. The 5nm ecosystem is now ready and Q3 is expected to be available in 2022.

The development of the 4nm process is progressing smoothly and trial production is expected to begin in Q3 this year, one quarter earlier than previously planned. TSMC predicts that due to cost considerations, there is generally a slight delay in the adoption of the most advanced process technology for products such as middle and low-end mobile phones and consumer electronics products. Most of them are still using 16/12nm and are moving towards 6nm. It is expected that the 4nm process will become the mainstream technology of such products in 2023.

The 3nm process will be mass produced in the second half of 2022 as planned. TSMC said that the 3nm process will become the most advanced logic technology in the world. Compared with the 5nm process, the 3nm process speed is increased by 15%, the power consumption is reduced by 30%, and the logic density is increased by 70%. 3nm will continue to adopt the FinFET structure and plans to mass produce in the wafer 18 plants in the second half of next year. "it will become the most advanced technology in the world."

The 2nm process has just entered the stage of formal research and development. TSMC 2nm process will introduce nano-wafer transistors for the first time to replace the current FinFET structure. According to the experiment, the nano-wafer transistor can reduce the Vt fluctuation by at least 15%.

In addition, TSMC announced that in order to support the development and mass production of advanced processes, TSMC's capital expenditure will reach US $30 billion in 2021, and the total investment is expected to reach US $100 billion within three years. TSMC also declared that TSMC "will have sufficient production capacity." practical action to respond to customer support.

In terms of production, TSMC also has a multi-directional layout.

On the one hand, TSMC's $12 billion 5nm 12-inch fab in Arizona is already under construction. It is expected to start mass production of 5nm process chips in 2024 with a monthly production capacity of about 20, 000 chips.

On the other hand, under the background of global core shortage, TSMC continues to expand production. The company's Tainan plant Fab 18 Phase 5-8 will be responsible for the 3nm process; Fab 18 Phase 4 will be used for 5nm process expansion, and plans to establish a new plant in Hsinchu Fab 20 for 2nm process production.

Of course, TSMC has not left behind the 3D packaging technology that attracted much attention in the post-Moore era.

Last year, TSMC announced the launch of 3DFabric, a 3D IC packaging technology platform composed of silicon stacking and advanced packaging technologies (SoIC, InFO, CoWoS). Wei Zhijia said today that he will continue to expand the 3DFabric platform.

The latest technology under the 3DFabric platform is SoIC, which is the industry's first high-density 3D microwafer (chiplet) stacking technology, which can heterogeneous integrate grains of different sizes, functions and nodes. SoIC is expected to go into production in small quantities in 2022, and there will be five 3DFabric fabs by the end of the same year.

In the face of "assuming that Moore's Law fails, can the semiconductor industry take into account the optimization needs of computing and energy consumption?" Wei Zhe-Jia showed no fear: "do we have the ability to accept this challenge?" Yes,we can! "