Recently, the Intel research team released a new research paper showing a method of stacking transistors that can increase the number of transistors per unit area by 30% and 50%. The company says it will continue to accelerate the miniaturization of chips over the next decade.
Intel is reportedly trying to regain its lead in producing the smallest and fastest chips, and although CEO Kissinger has made plans to regain the lead in 2025, the progress announced by the company's research team at an international conference in San Francisco shows Intel's competitive plans beyond 2025.
It is reported that one of Intel's ways to integrate more computing power into the chip is to add chip stack or small chip (chiplet) in three-dimensional space. In addition to increasing the density of transistors, the team demonstrated another technology that could increase the number of connections between stacked chips tenfold, meaning more complex chips could be stacked together.
"by stacking the chips directly together, we have significantly saved space," Paul Fischer, head of Intel component research and senior chief engineer, said in an interview. "We are shortening the length of interconnection and really saving energy, which not only improves cost efficiency, but also improves performance."
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