Shanghai (Gasgoo)- On December 25, Chinese automotive chipmaker SiEngine announced that its 7-nanometer advanced driver-assistance chips, AD1000 and AD800, have officially entered mass production. The company said it is now working closely with automakers and other ecosystem partners to advance commercial deployment.
According to company disclosures, the AD1000 is built on a multi-core heterogeneous architecture that integrates high-performance CPUs, GPUs, and neural processing units optimized for AI workloads. A single chip delivers up to 512 TOPS of AI computing power, while multi-chip configurations can scale performance to as high as 2,048 TOPS. The chip also incorporates a top-tier ASIL-D safety island, underscoring SiEngine's push to address functional safety, data security, and long-term technological readiness in parallel.
Designed as a highly scalable computing platform, the chip supports both conventional convolutional neural network algorithms and next-generation Transformer-based models at the hardware level. Its architecture allows flexible scaling from single-core to multi-core configurations, enabling efficient execution of large individual models as well as true physical parallelism for multiple AI workloads.
SiEngine said the AD1000 has been hardware-optimized for both current and emerging algorithm paradigms, including BEV-based perception, end-to-end driving models, vision-language-action (VLA) systems, and world models. These optimizations are aimed at supporting complex urban navigation-on-autopilot functions, positioning the chip as a hardware foundation for automakers transitioning from L2 driver assistance toward L3 conditional automated driving.
Key capabilities of the AD1000 platform span computing performance, safety, scalability, and developer usability.
Manufactured using a 7nm automotive-grade process, the chip combines high integration with a heterogeneous multi-core design. It delivers up to 250,000 DMIPS of CPU performance alongside 512 TOPS from its NPU, with native support for both CNN and Transformer models. Memory bandwidth reaches 204 GB/s through a 256-bit LPDDR5 interface, while dual neural network accelerators enhance perception workloads and compatibility with mainstream AI frameworks.
On the safety front, the platform has obtained ISO 26262 ASIL-B product certification and integrates a high-performance MCU meeting ASIL-D requirements, helping reduce overall system costs. Its self-developed cryptographic IP supports Chinese national algorithms and complies with EVITA Full HSM standards. In terms of connectivity and expansion, the chip supports up to 20 camera inputs, PCIe 4.0, 10GbE TSN Ethernet, and CAN-FD interfaces. SiEngine also emphasizes developer accessibility, citing support for major deep learning frameworks, proprietary middleware, and an open, optimized library of AI operators.
SiEngine's progress in driver-assistance chips builds on its earlier success in smart cockpit processors. Its SE1000 chip has already been adopted across dozens of mass-production models, including vehicles from Lynk & Co, Geely Galaxy, FAW Hongqi, Volvo, and Changan NEVO. Late last year, the SE1000 marked a milestone by becoming the first China developed cockpit chip to secure an overseas vehicle order from Volkswagen's headquarters in Germany.
