[Samsung’s Taylor fab capacity in the US fully booked before trial production]

Media reported, citing Samsung Electronics, that Samsung Electronics has opened an advanced semiconductor packaging R&D facility in Yokohama, Japan. Samsung previously announced a plan to invest about 40 billion yen over the five years starting in 2024 to expand the laboratory's research hardware facilities and strengthen its advanced packaging technology capabilities. The advanced packaging laboratory will collaborate with Japanese enterprises, universities, and research institutions to develop next-generation packaging materials and processes. Samsung plans to grow the facility's research staff to more than 100 people by 2027.

Qualcomm (QCOM.O) announced today a multi-generation collaboration with Amazon (AMZN.O) to provide customized chips for large-scale AI data centers and jointly advance AI inference. The two companies are also collaborating on optical interconnect solutions of up to 1.6T and future generations. Qualcomm plans to deepen its use of AWS AI infrastructure, including Amazon Bedrock, for electronic design automation (EDA) workloads, with the goal of shortening chip design cycles. Qualcomm President and CEO Cristiano Amon said that with accelerating AI demand, data center infrastructure requires breakthroughs in both compute and connectivity, and Qualcomm is pleased to collaborate with AWS on customized chips and connectivity solutions. AWS Vice President Prasad Kalyanaraman said this collaboration builds on a strong partnership, with a shared commitment to providing clients with more efficient and cost-effective infrastructure.

According to the Seoul Economic Daily, Samsung Electronics will jointly develop High-NA extreme ultraviolet (EUV) lithography technology with ASML, the world's largest lithography equipment manufacturer. Samsung is participating in an effort to drive a shift in industry standards, moving from the 6-inch photomasks that have been in use since the 1980s to 12-inch versions, and is striving to be the first to establish a DRAM mass production system based on High-NA EUV equipment. Samsung plans to apply High-NA EUV equipment to DRAM production starting in 2028, and will subsequently extend the technology to its 1.4-nanometer advanced logic process to drive the development of its foundry business. Enlarging the mask size is intended to compensate for the limitations of EUV technology. High-NA EUV has a numerical aperture 66% higher than conventional EUV, enabling the formation of finer circuit patterns. Replacing the currently used 6-inch masks with 12-inch masks can improve fab productivity and reduce chip manufacturing costs.